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  • CREACH LABS - Annual PhD Funding Campaign

    CREACH LABS launches its 2025 thesis grants campaign, joint with the DGA, AID, the Brittany Region and the EUR CyberSchool.
    November 06, 2024

    • Seminar

    • SoSysec

    The Design and Implementation of a Virtual Firmware Monitor

    • January 30, 2026 (11:00 - 12:00)

    • Inria Centre of the University of Rennes - Room Petri/Turing

    Speaker : Charly Castes - EPFL

    Low level software is often granted high privilege, yet this need not be the case. Although vendor firmware plays a critical role in the operation and management of the machine, most of its functionality does not require unfettered access to security critical software and data. In this paper we demonstrate that vendor firmware can be safely and efficiently deprivileged, decoupling its[…]

    • SoSysec

    • Compartmentalization

    • Operating system and virtualization

    • Seminar

    • SemSecuElec

    Sécurité physique du mécanisme d'encapsulation de clé Classic McEliece

    • March 20, 2026 (10:00 - 11:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : Brice Colombier - Laboratoire Hubert Curien, Université Jean Monnet, Saint-Étienne

    Le mécanisme d'encapsulation de clé Classic McEliece faisait partie des candidats toujours en lice au dernier tour du processus de standardisation de la cryptographie post-quantique initié par le NIST en 2016. Fondé sur les codes correcteurs d'erreurs, en particulier autour du cryptosystème de Niederreiter, sa sécurité n'a pas été fondamentalement remise en cause. Néanmoins, un aspect important du[…]

    • SemSecuElec

    • Implementation of cryptographic algorithm

    • Seminar

    • Cryptography

    Séminaire C2 à INRIA Paris

    • January 16, 2026 (10:00 - 17:00)

    • INRIA Paris

    Emmanuel Thomé et Pierrick Gaudry; Rachelle Heim Boissier; Épiphane Nouetowa; Dung Bui.  Plus d'infos sur https://seminaire-c2.inria.fr/ 

    • Seminar

    • SemSecuElec

    Chamois: Formally verified compilation for optimisation and security

    • June 26, 2026 (10:00 - 11:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : David MONNIAUX - CNRS - Verimag

    Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]

    • SemSecuElec

    • Fault injection

    • Formal methods

    • Seminar

    • SemSecuElec

    ML-Based Hardware Trojan Detection in AI Accelerators via Power Side-Channel Analysis

    • January 16, 2026 (11:00 - 12:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : Yehya NASSER - IMT Atlantique

    Our work discusses the security risks associated with outsourcing AI accelerator design due to the threat of hardware Trojans (HTs), a problem traditional testing methods fail to address. We introduce a novel solution based on Power Side-Channel Analysis (PSCA), where we collect and preprocess power traces by segmenting them and extracting features from both time and frequency domains. This[…]

    • SemSecuElec

    • Side-channel

    • Machine learning

    • Hardware trojan

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