Table of contents

  • This session has been presented March 27, 2009.

Description

  • Speaker

    Nele Mentens - Katholieke Universiteit Leuven

Security in embedded systems requires the choice of a suitable implementation platform. For some systems, a general purpose microprocessor satisfies the requirements, but when high performance is the main criterium, cryptographic coprocessors in hardware are indispensable. When very high performance is required or when a high volume of coprocessors is needed, ASICs (Application Specific Integrated Circuits) are chosen as implementation platforms. In this case, the reconfigurability of FPGAs (Field Programmable Gate Arrays) is only used for prototyping. However, because of the efforts of FPGA manufacturing companies, the performance gap between ASICs and FPGAs becomes smaller and smaller. FPGAs have become heterogeneous systems with a variety of dedicated resources such as multiplier blocks, DSP slices, RAM blocks,... This explains the trend that FPGAs are more and more used as end products. Following this trend, the need for specific FPGA architectures can be justified. This presentation focuses on cryptographic coprocessor design, optimized for FPGAs.

Next sessions

  • Cryptanalysis of full BEANIE

    • June 05, 2026 (13:45 - 14:45)

    • IRMAR - Université de Rennes - Campus Beaulieu Bat. 22, RDC, Rennes - Amphi Lebesgue

    Speaker : Xavier Bonnetain - Inria

    BEANIE is a tweakable block cipher recently published at ToSC aiming for memory encryption of microcontroller units. In line with this goal, it handles small plaintexts of only 32 bits and has a low latency. In this paper, we propose the first third-party analysis of the two variants of BEANIE. By carefully leveraging structural properties of the cipher and taking advantage of its distinctive[…]
    • Cryptography

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