Description
Embedded electronic systems and their associated softwares are used in an always increasing number of daily life, industrial and government applications. The security of these systems is a major societal, economic and sovereignty issue. This leads to increasingly activities in research and development by scientists, industry and government services, and especially around the region around Rennes.
The topics that will be discussed during the seminar address the study, the analysis, the performance and security evaluation, the validation, and regulatory aspects of all components of secure embedded electronic systems. All these points will be addressed both at theoretical and experimental levels. Among the discussed topics, one can find: basic elements and components in electronic circuits (FPGA, ASIC, smart-cards, micro-controller), associated softwares, cryptographic primitives, crypto-processors and accelerators, secure storage, secure communication on chip, etc. One can also find secure architecture design, hardware/software co-design, performances analysis, security modules (active and passive countermeasures, secure test systems, secure memories, secure communication on chip, etc.), side channel attacks, fault injection attacks, methods and tools for reverse engineering, CAD tools and formal tools for electronic (for design or test), etc.
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- Vianney Lapôtre (Université Bretagne Sud, Lab-STICC)
- Rachid Dafali (DGA)
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The scientific board is in charge of the organization and the program of the seminar.
Its members are:- Vianney Lapôtre (Université Bretagne Sud, Lab-STICC)
- Rachid Dafali (DGA)
- David Elleouet (DGA)
- Ruben Salvador (CentraleSupélec, IRISA)
- Jordane Lorandel (Université de Rennes, IETR)
- Maria Mendez Real (Université Bretagne Sud, Lab-STICC)
- Ronan Lashermes (Inria Rennes)
- Guénaël Renault (ANSSI)
- Jose Lopes Esteves (ANSSI)
- Nadia Derouault (Inria) - assistant
A seminar session will include two 45-minute talks followed by questions. The complete duration (talk + questions) for each presenter will be 1 hour.
If needed, the scientific committee may propose two short 25-minute talks instead of one 45-minute talk.
People attending to this seminar may have very different backgrounds. Then, it is required that the presenter motivates her/his work and provides explanations in a simple and clear language.
Practical infos
Next sessions
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Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-Based Detection
Speaker : Alan Díaz Rizo - Sorbonne Université Lip6
The threat of Hardware Trojan-based Covert Channels (HT-CCs) presents a significant challenge to the security of wireless communications. In this work, we generate in hardware and make open-source a dataset for various HT-CC scenarios. The dataset represents transmissions from a HT-infected RF transceiver hiding a CC that leaks information. It encompasses a wide range of signal impairments, noise[…]-
SemSecuElec
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Machine learning
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Hardware trojan
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Measurement the thermal component of clock jitter used as entropy source by TRNGs
Speaker : Arturo GARAY - STMicroelectronics
Introduction Measuring the thermal component of clock jitter as an entropy source for True Random Number Generators (TRNGs) is compulsory for the security and evaluation of clock-jitter based TRNGs. However, identifying and isolating the local thermal noise component from other noise sources, particularly flicker noise, while performing a precise measurement remains a challenge. Current[…]-
SemSecuElec
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TRNG
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Cryptanalytical extraction of complex Neural Networks in black-box settings
Speaker : Benoit COQUERET - INRIA, Thales CESTI
With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
SemSecuElec
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Side-channel
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Machine learning
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Advanced techniques for fault injection attacks on integrated circuits
Speaker : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet
The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]-
SemSecuElec
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Fault injection
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Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks
Speaker : Gauthier Cler - SERMA Safety & Security
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]-
SemSecuElec
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Side-channel
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Machine learning
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Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Speaker : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
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Side-channel
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Hardware reverse
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