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4 résultats
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Séminaire
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Cryptographie
Cryptanalysis of full BEANIE
Orateur : Xavier Bonnetain - Inria
BEANIE is a tweakable block cipher recently published at ToSC aiming for memory encryption of microcontroller units. In line with this goal, it handles small plaintexts of only 32 bits and has a low latency. In this paper, we propose the first third-party analysis of the two variants of BEANIE. By carefully leveraging structural properties of the cipher and taking advantage of its distinctive[…]-
Cryptography
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Symmetrical primitive
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Séminaire
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SemSecuElec
Chamois: Formally verified compilation for optimisation and security
Orateur : David MONNIAUX - CNRS - Verimag
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
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Fault injection
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Formal methods
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Séminaire
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SemSecuElec
Security of Smart Dust: Robust Key Derivation for Single-Chip Systems
Orateur : Sara Faour - Inria
The Smart Dust vision seeks to enable large networks of millimeter-scale wireless sensor nodes that tightly integrate sensing, computation, communication, and power management into a single-chip device. Establishing a robust hardware root of trust for such devices remains challenging, particularly in single, low-cost chip manufacturing processes that lack embedded writable Non-Volatile Memory (NVM[…] -
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Séminaire
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SemSecuElec
Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Orateur : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
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Side-channel
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Micro-architectural vulnerabilities
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