Description
Field programmable gate arrays (FPGAs) use encryption to protect the configuration data or “bitstream” containing the design to be run on the device. This encryption aims at protecting the intellectual property and other secrets contained in the bitstream and preventing e.g. cloning or tampering with an FPGA implementation.
This talk will demonstrate how attackers can use failure analysis equipment, namely laser scanning microscopes (LSMs), to break the bitstream security on recent FPGAs. Two attacks will be presented: one for decryption key readout, and one for extraction of the plaintext data. Both attacks do not require any device preparation or silicon polishing, which technically makes them non-invasive attacks.
The attack against the decryption key makes use of thermal laser stimulation (TLS). TLS is a failure analysis technique which can be deployed by an adversary to read out stored secrets in the SRAM of a chip. As the attack target, the so-called battery-backed SRAM (BBRAM) key storage inside a 20 nm technology Xilinx Kintex UltraScale FPGA is chosen. It is demonstrated that an attacker is able to extract the stored 256-bit AES key by conducting just a single measurement. The required effort to develop the attack is shown to be less than 7 hours.
The attack for plaintext data extraction applies optical contactless probing techniques. Optical contactless probing, again a failure analysis technique, allows attackers to localize and probe secret data on a chip with a laser beam. The attack is conducted on the decryption ASIC of a 28 nm technology Xilinx Kintex 7 FPGA. It is demonstrated that the adversary is able to extract the plaintext data containing sensitive design information and intellectual property. Less than 10 working days are needed to conduct the optical analysis and reverse-engineer the security-related parts of the hardware.
Infos pratiques
Prochains exposés
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FeFET based Logic-in-Memory design, methodologies, tools and open challenges
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TrustSoC : a heterogeneous secure-by-design SoC architecture
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The influence of flicker noise on ring oscillator-based TRNGs
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Hardware Trojan Horses and Microarchitectural Side-Channel Attacks: Detection and Mitigation via Hardware-based
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Hardware Trojan Horses that are software-exploitable can be inserted into microprocessors, allowing attackers to run unauthorized code or escalate privileges. Additionally, it has been demonstrated that attackers could observe certain microprocessor features - seemingly unrelated to the program's execution - to exfiltrate secrets or private data. So, even devices produced in secure foundries could[…]-
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Canaux auxiliaires
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Vulnérabilités micro-architecturales
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Cheval de Troie matériel
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Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-Based Detection
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The threat of Hardware Trojan-based Covert Channels (HT-CCs) presents a significant challenge to the security of wireless communications. In this work, we generate in hardware and make open-source a dataset for various HT-CC scenarios. The dataset represents transmissions from a HT-infected RF transceiver hiding a CC that leaks information. It encompasses a wide range of signal impairments, noise[…]-
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Apprentissage machine
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Cryptanalytical extraction of complex Neural Networks in black-box settings
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With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
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Canaux auxiliaires
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Apprentissage machine
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