Description
Field programmable gate arrays (FPGAs) use encryption to protect the configuration data or “bitstream” containing the design to be run on the device. This encryption aims at protecting the intellectual property and other secrets contained in the bitstream and preventing e.g. cloning or tampering with an FPGA implementation.
This talk will demonstrate how attackers can use failure analysis equipment, namely laser scanning microscopes (LSMs), to break the bitstream security on recent FPGAs. Two attacks will be presented: one for decryption key readout, and one for extraction of the plaintext data. Both attacks do not require any device preparation or silicon polishing, which technically makes them non-invasive attacks.
The attack against the decryption key makes use of thermal laser stimulation (TLS). TLS is a failure analysis technique which can be deployed by an adversary to read out stored secrets in the SRAM of a chip. As the attack target, the so-called battery-backed SRAM (BBRAM) key storage inside a 20 nm technology Xilinx Kintex UltraScale FPGA is chosen. It is demonstrated that an attacker is able to extract the stored 256-bit AES key by conducting just a single measurement. The required effort to develop the attack is shown to be less than 7 hours.
The attack for plaintext data extraction applies optical contactless probing techniques. Optical contactless probing, again a failure analysis technique, allows attackers to localize and probe secret data on a chip with a laser beam. The attack is conducted on the decryption ASIC of a 28 nm technology Xilinx Kintex 7 FPGA. It is demonstrated that the adversary is able to extract the plaintext data containing sensitive design information and intellectual property. Less than 10 working days are needed to conduct the optical analysis and reverse-engineer the security-related parts of the hardware.
Infos pratiques
Prochains exposés
-
Advanced techniques for fault injection attacks on integrated circuits
Orateur : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet
The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]-
SemSecuElec
-
Fault injection
-
-
PHOENIX : the first crypto-agile hardware solution for ML-KEM and HQC
Orateur : Antonio RAS
The security of the public-key cryptography protecting today and tomorrow's communication is threatened by the advent of quantum computers. To address this challenge, post-quantum cryptography is employed to devise new quantum-resistant cryptosystems. The National Institute of Standards and Technology (NIST), which led the quantum-safe transition, has already standardized the first lattice KEM[…]-
Cryptography
-
SemSecuElec
-
Hardware accelerator
-
-
Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks
Orateur : Gauthier Cler - SERMA Safety & Security
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]-
SemSecuElec
-
Side-channel
-
Machine learning
-
-
Cryptanalytical extraction of complex Neural Networks in black-box settings
Orateur : Benoit COQUERET - INRIA, Thales CESTI
With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
SemSecuElec
-
Side-channel
-
Machine learning
-
-
Fine-grained dynamic partitioning against cache-based side channel attacks
Orateur : Nicolas Gaudin - Trasna
The growth of embedded systems takes advantage of architectural advances from modern processors to increase performance while maintaining a low power consumption. Among these advances is the introduction of cache memory into embedded systems. These memories speed up the memory accesses by temporarily storing data close to the execution core. Furthermore, data from different applications share the[…]-
SemSecuElec
-
Micro-architectural vulnerabilities
-
Hardware architecture
-
-
Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Orateur : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
-
Side-channel
-
Hardware reverse
-