Description
At PQShield, we’ve developed dedicated coprocessor(s) for lattice schemes, hash-based signatures, and code-based cryptography. These cryptographic modules are commercial rather than academic and designed to meet customer specifications such as a specific performance profile or Common Criteria and FIPS security certification requirements.
Hardware implementations of legacy RSA and Elliptic Curve cryptography were generally just “big integer” engines. Post-quantum algorithms use a much broader range of primitive operations and are generally more complex.
Monolithic hardware implementations are self-contained modules implementing the entire algorithm. A monolithic implementation has a clear security boundary but will lead to inflexibility and a relatively large area. On the other hand, a co-design approach will offload only those computations to special memory-mapped peripherals or custom instructions that benefit from it the most, e.g., SHAKE or large polynomial/vector/matrix circuitry. We discuss our experiences with both of these approaches, drawing from our engineering experience.
Infos pratiques
Prochains exposés
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Cryptanalytical extraction of complex Neural Networks in black-box settings
Orateur : Benoit COQUERET - INRIA, Thales CESTI
With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
SemSecuElec
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Side-channel
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Machine learning
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Advanced techniques for fault injection attacks on integrated circuits
Orateur : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet
The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]-
SemSecuElec
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Fault injection
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PHOENIX: Crypto-Agile Hardware Sharing for ML-KEM and HQC, hardware implementation of a PQC accelerator
Orateur : Antonio RAS
The security of the public-key cryptography protecting today and tomorrow’s communication is threatened by the advent of quantum computers. The transition to quantum-safe algorithms has begun: NIST has already standardized ML-KEM, a lattice-based KEM, and marked three code-based KEMs, including HQC, as alternatives for possible future standardization. The relative immaturity of all of these[…]-
Cryptography
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SemSecuElec
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Hardware accelerator
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Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks
Orateur : Gauthier Cler - SERMA Safety & Security
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]-
SemSecuElec
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Side-channel
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Machine learning
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Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Orateur : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
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Side-channel
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Hardware reverse
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