Description
The Internet of Things (IoT) is constituted of devices that are expo-nentially growing in number and in complexity. They use plentiful customized firmware and hardware, ignoring potential security issues, which make them a perfect victim for cybercriminals, especially malware authors.
We will describe a new usage of side channel information to identify threats that are targeting the device. Using our approach, a malware analyst is able to accuracy know about malware type and identity, even in the presence of obfuscation techniques which may avoid static or symbolic binary analysis. We captured 100,000 leakage traces from an IoT device infected by a miscellaneous and representative in-the-wild malware samples and realistic benign activity. Our technique does not need to modify the target device. Thus, it can be deployed independently from the resources available without any overhead. Moreover, our approach has the advantage that it can hardly be detected and evaded by the malware authors.
In our experiments, we were able to classify three generic malware types (and one benign class) with an accuracy of 99.82%. Even more, we show that our solution permits to classify altered malware samples with unseen obfuscation techniques during the training phase, and to determine what kind of obfuscations were applied to the binary, which makes our approach particularly useful for malware analysts.
Infos pratiques
Prochains exposés
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HDL simulation for Masked Software Verification
Orateur : Quentin Meunier - Sorbonne Univ. Lip6
Masking is a countermeasure against Side-Channel Attacks (SCA) that aims to ensure that intermediate computations in an algorithm have secret-independent distributions through the use of random variables. This theoretically prevents SCAs, as power consumption is directly linked to the values manipulated by the program or hardware device. Designing a masking scheme is often non-trivial, and a[…]-
SemSecuElec
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Side-channel
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Étude, caractérisation et détection de verrouillage d'anneaux oscillants utilisés dans les générateurs de nombres aléatoires.
Orateur : Eloise Delolme - LabHC
Les générateurs de nombres aléatoires matériels basés sur des oscillateurs en anneau (RO-TRNGs) exploitent le jitter d’horloge comme source d’aléa afin de produire des séquences de bits aléatoires. Parmi ces architectures, le MURO-TRNG repose sur un modèle stochastique complexe qui suppose notamment l’indépendance des oscillateurs. Toutefois, dans la pratique, les oscillateurs en anneau sont[…]-
SemSecuElec
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TRNG
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Chamois: Formally verified compilation for optimisation and security
Orateur : David MONNIAUX - CNRS - Verimag
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
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Fault injection
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Formal methods
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Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Orateur : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
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Side-channel
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Micro-architectural vulnerabilities
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