33 results

  • Code-based postquantum cryptography : candidates to standardization

    • April 23, 2021

    • INRIA - Web-Conférence

    Speaker : Nicolas Sendrier

    At the third round of the NIST standardization process, three candidates remain with a security based on error correcting codes, all are key exchange mechanisms. We will explore them according to their security assumptions and properties. Among them, we find an historical scheme (Classic McEliece), as well as schemes using sparse and quasi-cyclic matrices (BIKE and HQC). We will examine pros and[…]
  • Post-Quantum Cryptography Hardware: Monolithic Implementations vs. Hardware-Software Co-Design

    • April 23, 2021

    • PQShield – United Kingdom - Web-Conférence

    Speaker : Markku-Juhani Saarinen

    At PQShield, we’ve developed dedicated coprocessor(s) for lattice schemes, hash-based signatures, and code-based cryptography. These cryptographic modules are commercial rather than academic and designed to meet customer specifications such as a specific performance profile or Common Criteria and FIPS security certification requirements.Hardware implementations of legacy RSA and Elliptic Curve[…]
  • SideLine and the advent of software-induced hardware attacks

    • March 19, 2021

    • Mines Saint-Etienne – Thales - Web-Conférence

    Speaker : Joseph Gravellier

    In this talk, we will discuss software-induced hardware attacks and their impact for IoT, cloud and mobile security. More specifically, I will introduce SideLine, a new power side-channel attack vector that can be triggered remotely to infer cryptographic secrets. SideLine is based on the intentional misuse of delay-lines components embedded in SoCs that use external memory. I will explain how we[…]
  • Calibration Done Right: Noiseless Flush+Flush Attacks

    • March 19, 2021

    • DGA-IRISA - Web-Conférence

    Speaker : Guillaume Didier

    Caches leak information through timing measurements and so-called side-channel attacks. Several primitives exist with different requirements and trade-offs. Flush+Flush is a stealthy and fast cache attack primitive that uses the timing of the clflush instruction depending on the presence of a line in the cache. However, the CPU interconnect plays a bigger role than thought in these timings, and[…]
  • libecc: a flexible open-source ECC library for embedded devices

    • February 14, 2020

    • ANSSI - Salle Pétri/Turing

    Speaker : Ryad Benadjila et Arnaud Ebalard

    libecc is a software library for elliptic curves based cryptography (ECC), with an API supporting signature algorithms specified in the ISO14888-3 standard.Advanced usages of this library also include the possible implementation of elliptic curve based Diffie-Hellman protocols as well as any algorithm on top of prime fields based elliptic curves (or prime fields, or rings of integers).The[…]
  • Vers une meilleure compréhension de l’apprentissage profond appliqué aux attaques par observation

    • January 10, 2020

    • CEA - Salle Métivier

    Speaker : Loïc Masure

    Les attaques par observation (SCA) exploitent les failles d’une primitive cryptographique embarquée sur un composant (type carte à puce, IoT, …), en mesurant des grandeurs physiques qui dépendent indirectement de la valeur de la clé secrète. C’est pourquoi il est primordial pour les développeurs de proposer des contre-mesures adaptées et d’évaluer leur efficacité face à un attaquant potentiel.Au[…]