Description
The masking countermeasure constitutes a provably secure approach against side-channel attacks. Nonetheless, in the software context, the micro-architecture underlying a given CPU potentially induces information leakages undermining the masking's proven security.
In this seminar, I will present the research work developed during my Ph.D. at CEA-List in Grenoble. This work addresses, along two axes, the problem of developing practically secure masked software.
The first axis targets the automated generation of masked software resilient to transition-based leakages, putting forward the employment of register allocation and instruction scheduling to mitigate such leakages during the compilation of the masked software.
The second axis focuses on the impact of the micro-architecture on alternative types of masking, studying their potential employment as a micro-architecture-independent approach to protect software implementations against both transition-based leakages and data parallelism; this latter an unexplored topic for masked software implementations.
I will conclude the seminar highlighting key points concerning the development of practically secure masked software and potential future developments of my research work.
Next sessions
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Cryptanalytical extraction of complex Neural Networks in black-box settings
Speaker : Benoit COQUERET - INRIA, Thales CESTI
With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
SemSecuElec
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Side-channel
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Machine learning
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Advanced techniques for fault injection attacks on integrated circuits
Speaker : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet
The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]-
SemSecuElec
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Fault injection
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Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks
Speaker : Gauthier Cler - SERMA Safety & Security
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]-
SemSecuElec
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Side-channel
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Machine learning
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Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Speaker : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
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Side-channel
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Hardware reverse
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