Description
Would your latest program produce correct results if I skipped a statement in it? Two? Corrupted a variable at random? Then it might not be robust against _fault injection attacks_, which target hardware directly and have such effects. To be fair, nothing really resists them; still, efforts in designing protections have come a long way, relying (perhaps surprisingly) in large part on hardening code, which is much easier to deploy than new hardware. Of course, modeling the effects of physical tinkering at the abstraction level of a program requires inherent approximations, and recent work has shown that even countermeasures based on assembler-level models (the most common type) can still be bypassed by abusing micro-architectural effects.
In this non-expert talk, I'll discuss fault attacks from a programming-language point of view. The focus will be on conceptualizing what faults and countermeasures mean for programs. I'll show how building a semantic model of a vicious kind of instruction skip leads us to design a mixed software/hardware countermeasure and formally prove it secure. I'll also touch briefly on the challenges of implementing security transformations in the LLVM compiler, which understands security about as well as C (for non-C-programmers, that's not at all). This talk will treat you to both inference rules and linker relocations.
Practical infos
Next sessions
-
Advanced techniques for fault injection attacks on integrated circuits
Speaker : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet
The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]-
SemSecuElec
-
Fault injection
-
-
PHOENIX : the first crypto-agile hardware solution for ML-KEM and HQC
Speaker : Antonio RAS
The security of the public-key cryptography protecting today and tomorrow's communication is threatened by the advent of quantum computers. To address this challenge, post-quantum cryptography is employed to devise new quantum-resistant cryptosystems. The National Institute of Standards and Technology (NIST), which led the quantum-safe transition, has already standardized the first lattice KEM[…]-
Cryptography
-
SemSecuElec
-
Hardware accelerator
-
-
Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks
Speaker : Gauthier Cler - SERMA Safety & Security
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]-
SemSecuElec
-
Side-channel
-
Machine learning
-
-
Cryptanalytical extraction of complex Neural Networks in black-box settings
Speaker : Benoit COQUERET - INRIA, Thales CESTI
With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]-
SemSecuElec
-
Side-channel
-
Machine learning
-
-
Fine-grained dynamic partitioning against cache-based side channel attacks
Speaker : Nicolas Gaudin - Trasna
The growth of embedded systems takes advantage of architectural advances from modern processors to increase performance while maintaining a low power consumption. Among these advances is the introduction of cache memory into embedded systems. These memories speed up the memory accesses by temporarily storing data close to the execution core. Furthermore, data from different applications share the[…]-
SemSecuElec
-
Micro-architectural vulnerabilities
-
Hardware architecture
-
-
Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Speaker : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
-
Side-channel
-
Hardware reverse
-