Sommaire

  • Cet exposé a été présenté le 20 décembre 2024 (10:00 - 11:00).

Description

  • Orateur

    François Sarrazin, Pierre Granier - University of Rennes, IETR (UMR 6164)

Electromagnetic leakage eavesdropping is an increasingly accessible attack vector due to the democratization of software-defined radio. "TEMPEST" attacks rely on passively listening to the unwanted electromagnetic emanations of a target (computer screen, low speed USB peripheral…) in order to retrieve the transmitted data. However, the range and properties of such leakages are unpredictable. Therefore, hardware implants have been designed to covertly extract data in a more controlled and covert manner compared to opportunistic leakage, in return for a more invasive attack. In this talk, we will focus on recent progress regarding the development of hardware Trojans based on backscattering methods to remotely extract data. In particular, the case of multi-Trojans allowing the taping of different sources will be presented.

Infos pratiques

Prochains exposés

  • Advanced techniques for fault injection attacks on integrated circuits

    • 25 avril 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Paul Grandamme - Laboratoire Hubert Curien, Université Jean Monnet

    The security of integrated circuits is evaluated through the implementation of attacks that exploit their inherent hardware vulnerabilities. Fault injection attacks represent a technique that is commonly employed for this purpose. These techniques permit an attacker to alter the nominal operation of the component in order to obtain confidential information. Firstly, we propose the utilisation of[…]

    • SemSecuElec

    • Fault injection

  • PHOENIX : the first crypto-agile hardware solution for ML-KEM and HQC

    • 25 avril 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Antonio RAS

    The security of the public-key cryptography protecting today and tomorrow's communication is threatened by the advent of quantum computers. To address this challenge, post-quantum cryptography is employed to devise new quantum-resistant cryptosystems. The National Institute of Standards and Technology (NIST), which led the quantum-safe transition, has already standardized the first lattice KEM[…]

    • Cryptography

    • SemSecuElec

    • Hardware accelerator

  • Anomalies Mitigation for Horizontal Side Channel Attacks with Unsupervised Neural Networks

    • 23 mai 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Gauthier Cler - SERMA Safety & Security

    The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural[…]

    • SemSecuElec

    • Side-channel

    • Machine learning

  • Cryptanalytical extraction of complex Neural Networks in black-box settings

    • 23 mai 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Benoit COQUERET - INRIA, Thales CESTI

    With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]

    • SemSecuElec

    • Side-channel

    • Machine learning

  • Fine-grained dynamic partitioning against cache-based side channel attacks

    • 27 juin 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Nicolas Gaudin - Trasna

    The growth of embedded systems takes advantage of architectural advances from modern processors to increase performance while maintaining a low power consumption. Among these advances is the introduction of cache memory into embedded systems. These memories speed up the memory accesses by temporarily storing data close to the execution core. Furthermore, data from different applications share the[…]

    • SemSecuElec

    • Micro-architectural vulnerabilities

    • Hardware architecture

  • Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models

    • 27 juin 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Julien Maillard - CEA

    Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]

    • SemSecuElec

    • Side-channel

    • Hardware reverse

Voir les exposés passés
Haut de page