Description
Introduction
- Measuring the thermal component of clock jitter as an entropy source for True Random Number Generators (TRNGs) is compulsory for the security and evaluation of clock-jitter based TRNGs. However, identifying and isolating the local thermal noise component from other noise sources, particularly flicker noise, while performing a precise measurement remains a challenge.
Current Techniques
- We present an overview of the most effective techniques currently available for measuring the thermal clock jitter component. However, even the best techniques may struggle to avoid the influence of flicker noise on their measurements. Consequently, their results risk representing an overestimation of the thermal jitter component.
Characterizing Clock Jitter
- We present state-of-the-art methods for distinguishing between flicker noise and thermal noise components of a random signal while introducing their problems when applied to the evaluation of TRNGs.
Conclusion
- Despite advancements, current clock jitter measurement techniques should be used cautiously.
Infos pratiques
Prochains exposés
-
Protection des processeurs modernes face à la vulnérabilité Spectre
Orateur : Herinomena ANDRIANATREHINA - Inria
Dans la quête permanente d'une puissance de calcul plus rapide, les processeurs modernes utilisent des techniques permettant d'exploiter au maximum leurs ressources. Parmi ces techniques, l'exécution spéculative tente de prédire le résultat des instructions dont l'issue n'est pas encore connue, mais dont dépend la suite du programme. Cela permet au processeur d'éviter d'être inactif. Cependant,[…]-
SemSecuElec
-
Micro-architectural vulnerabilities
-
-
Post-Quantum Cryptography Accelerated by a Superscalar RISC-V Processor
Orateur : Côme Allart - Inria
Two major changes are currently taking place in the embedded processor ecosystem: open source with the RISC-V instruction set, which could replace the ARM one, and post-quantum cryptography (PQC), which could replace classic asymmetric cryptography algorithms to resist quantum computers.In this context, this thesis investigates the improvement of embedded processor performance, generally for[…]-
SemSecuElec
-
Implementation of cryptographic algorithm
-
-
Chamois: Formally verified compilation for optimisation and security
Orateur : David MONNIAUX - CNRS - Verimag
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
-
Fault injection
-
Formal methods
-
-
Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Orateur : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
-
Side-channel
-
Micro-architectural vulnerabilities
-