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655 results

    • Seminar

    • SemSecuElec

    Rank metric cryptography and its implementations

    • October 08, 2021

    • XLIM – Université de Limoges - Salle Pétri/Turing

    Speaker : Nicolas Aragon

    In 2017, the NIST (National Institute for Standards and Technology) started astandardization process in order to select post-quantum encryption and digital signature schemes. Among the proposed solutions, two rank-metric based encryption schemes were selected for the second round of the standardization process: ROLLOand RQC.This raised questions about both the performance and the security of the[…]
    • Seminar

    • SemSecuElec

    Laser-Based Attacks Against FPGA Bitstream Encryption

    • June 07, 2019

    • Technische Universität Berlin - Salles Petri/Turing

    Speaker : Heiko Lohrke

    Field programmable gate arrays (FPGAs) use encryption to protect the configuration data or “bitstream” containing the design to be run on the device. This encryption aims at protecting the intellectual property and other secrets contained in the bitstream and preventing e.g. cloning or tampering with an FPGA implementation.This talk will demonstrate how attackers can use failure analysis equipment[…]
    • Seminar

    • SemSecuElec

    Security of Hardware/Software Interfaces : Research Chair of the Cybersecurity Research Cluster

    • June 22, 2018

    • Centrale-Supelec - Salles Petri/Turing

    Speaker : Guillaume Hiet

    We proposed to host a thematic semester on attacks based on the interaction between software and hardware. The goal would be to host one workshop, one summer school for young researchers, as well as multiple seminars and longer stays for researchers, spanning September 2019 to March or April 2020. This thematic semester will be funded by the DGA in the context of the Cybersecurity Research Cluster[…]
    • Seminar

    • SemSecuElec

    Calibration Done Right: Noiseless Flush+Flush Attacks

    • March 19, 2021

    • DGA-IRISA - Web-Conférence

    Speaker : Guillaume Didier

    Caches leak information through timing measurements and so-called side-channel attacks. Several primitives exist with different requirements and trade-offs. Flush+Flush is a stealthy and fast cache attack primitive that uses the timing of the clflush instruction depending on the presence of a line in the cache. However, the CPU interconnect plays a bigger role than thought in these timings, and[…]
    • Seminar

    • SemSecuElec

    TRAITOR : a multi clock-glitch attack platform reproducing EMI effects at low-cost

    • April 05, 2019

    • INRIA - Salles Pétri/Turing

    Speaker : Ludovic Claudepierre

    Electromagnetic injection (EMI) is a common and non-invasive technique used to perform fault attacks. In that case, an electromagnetic wave is radiated by an antenna in the close vicinity of the targeted microcontroller (STM32 in our case).The clock signal is generated thanks to a Phase-Locked-Loop (PLL). The PLL is highly sensitive to EMI and then induces severe disruption on the clock signal[…]
    • Seminar

    • SemSecuElec

    Unique CAD-compatible SCA-security mechanisms, externally amplified coupling (EAC) attacks and (some) connection

    • June 25, 2021

    • Bar-Ilan University (BIU) - Web-Conférence

    Speaker : Itamar Levi

    In this seminar I will first discuss unique computer aided design (CAD) compatible SCA security mechanisms. I will present an approach which can significantly increase the physical security-level of a design, be implemented with conventional design-tools and which does not require any special technological-support. The method consists with a correct by-design utilization of power-management[…]