Description
The CHERI ISA extension enables modern RISC CPU architectures such as RISC-V to enforce memory safety in C/C++ programs. Recent academic works use CHERI for point solutions like constructing enclaves, verifying C programs, or hardening bytecode interpreters, but since the original construction of the CHERI-BSD OS - a FreeBSD port leveraging CHERI capabilities, by Cambridge University - little has been reported on what issues and problems arise when porting an existing operating system to benefit from hardware capabilities. This work distills problematic patterns and their solution from what we believe has been the first successful port of a full Linux system to CHERI hardware. In the interest of reproducibility and possible future CHERI or porting style improvements, we also report on the performance impact of our setup.
Practical infos
Next sessions
-
Privacy-preserving collaboration for intrusion detection in distributed systems
Speaker : Léo Lavaur - Université du Luxembourg
The emergence of Federated Learning (FL) has rekindled the interest in collaborative intrusion detection systems, which were previously limited by the risks of information disclosure associated with data sharing. But is it a good collaboration tool? Originally designed to train prediction models on distributed consumer data without compromising data confidentiality, its use as a collaborative[…]-
SoSysec
-
Privacy
-
Intrusion detection
-
Distributed systems
-