Table of contents

  • This session has been presented April 05, 2019.

Description

  • Speaker

    Léo Reynaud

Les attaques side channel classiques nécessitent généralement la connaissance du clair (ou du chiffré) afin de calculer des données internes qui seront comparées à des fuites. Des attaques permettent cependant de s’affranchir de ces connaissances, les attaques par distributions jointes. Ces attaques supposent un attaquant capable d’inverser le modèle de consommation, mais aucune connaissance sur les entrées et les sorties du chiffrement. Un autre effet de ces attaques est qu’il est possible de les appliquer en milieu de chiffrement, ce qui peut s’avérer utile lorsque des protections sont appliquées uniquement aux extrémités pour des raisons de coût. Le principe réside dans le fait que la distribution des poids de Hamming (pour un modèle de consommation en poids de Hamming) d’une variable en début puis en fin de tour n’est pas uniforme, elle est même fonction de la clé utilisée. L’étude de ces distributions permet donc de discriminer la clé. Aujourd’hui le maximum de vraisemblance est l’outil qui semble être le plus approprié pour déduire la clé. Cette attaque peut aussi être menée dans certains cas d’implémentations protégées par du masquage booléen. Dans certains cas plus robustes, il est possible d’adapter cette attaque pour qu’elle fonctionne quand même. Pour cela, on utilise des distributions qui sont dites quadrivariées. La présentation aura donc pour but l’introduction à l’attaque de base, ainsi qu’à son adaptation contre des protections de type masquage d’ordre 1.

Practical infos

Next sessions

  • FeFET based Logic-in-Memory design, methodologies, tools and open challenges

    • November 29, 2024 (10:00 - 11:00)

    • Inria Center of the University of Rennes - - Aurigny room

    Speaker : Cédric Marchand - University of Lyon - Lyon Institute of Nanotechnology (UMR CNRS 5270)

    Data-centric applications such as artificial intelligence and the Internet of Things (IoT) impose increasingly stringent demands on the performance, the security and the energy efficiency of modern computing architectures. Traditional approaches are often unable to keep pace with these requirements making necessary to explore innovative paradigms such as in-memory computing. This paradigm is[…]

    • SemSecuElec

  • TrustSoC : a heterogeneous secure-by-design SoC architecture

    • November 29, 2024 (11:00 - 12:00)

    • Inria Center of the University of Rennes - - Aurigny room

    Speaker : Raphaële Milan - Université Jean Monnet Saint-Etienne, CNRS, Laboratoire Hubert Curien UMR 5516

    Since the 1970s, the complexity of systems on a chip has grown significantly. In order to improve system performance, manufacturers are integrating an increasing number of heterogeneous components on a single silicon chip. The incorporation of these components renders SoCs highly versatile yet significantly complex. Their multipurpose nature makes them suitable for use in a variety of domains,[…]

    • SemSecuElec

  • The influence of flicker noise on ring oscillator-based TRNGs

    • December 20, 2024 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Licinius-Pompiliu BENEA - Univ. Grenoble Alpes, CEA, LETI

    Ring oscillators (ROs) are often used in true random number generators (TRNGs). The jitter of their clock signal, used as a source of randomness, stems from thermal and flicker noises. While thermal noise jitter is often identified as the main source of randomness, flicker noise jitter is not taken into account due to its autocorrelated nature which greatly complexifies modelling. However, it is a[…]

    • SemSecuElec

    • TRNG

  • Hardware Trojan Horses and Microarchitectural Side-Channel Attacks: Detection and Mitigation via Hardware-based
    Methodologies

    • January 24, 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Alessandro PALUMBO - CentraleSupélec, IRISA, Inria

    Hardware Trojan Horses that are software-exploitable can be inserted into microprocessors, allowing attackers to run unauthorized code or escalate privileges. Additionally, it has been demonstrated that attackers could observe certain microprocessor features - seemingly unrelated to the program's execution - to exfiltrate secrets or private data. So, even devices produced in secure foundries could[…]

    • SemSecuElec

    • Side-channel

    • Micro-architectural vulnerabilities

    • Hardware trojan

  • Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-Based Detection

    • February 28, 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Alan Díaz Rizo - Sorbonne Université Lip6

    The threat of Hardware Trojan-based Covert Channels (HT-CCs) presents a significant challenge to the security of wireless communications. In this work, we generate in hardware and make open-source a dataset for various HT-CC scenarios. The dataset represents transmissions from a HT-infected RF transceiver hiding a CC that leaks information. It encompasses a wide range of signal impairments, noise[…]

    • SemSecuElec

    • Machine learning

    • Hardware trojan

  • Cryptanalytical extraction of complex Neural Networks in black-box settings

    • March 28, 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Benoit COQUERET - INRIA, Thales CESTI

    With the widespread development of artifical intelligence, Deep Neural Networks (DNN) have become valuable intellectual property (IP). In the past few years, software and hardware-based attacks targetting at the weights of the DNN have been introduced allowing potential attacker to gain access to a near-perfect copy of the victim's model. However, these attacks either fail against more complex[…]

    • SemSecuElec

    • Side-channel

    • Machine learning

Show previous sessions
Page top